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PLX Technology Announces PCI Express Gen 2 Switch Family

PLX Technology has built upon its Gen 1 portfolio by delivering the broadest Gen 2 switch family to market. These Gen 2 switches now bring to 26 the number of PLX PCIe products available, the majority of which are in full production today with over one million chips shipped.

The new ExpressLane PCIe Gen 2 switches include the PEX 8648 (48 lanes, 12 ports), PEX 8632 (32 lanes, 12 ports), PEX 8624 (24 lanes, 6 ports), PEX 8616 (16 lanes, 4 ports) and PEX 8612 (12 lanes, 3 ports). These Gen 2 switches share a field-tested and proven PLX architecture with such features as the lowest latency and power, highest performance, integrated non-transparent ports and Hot-Plug controllers, the smallest Flip-Chip packaging, and highly flexible port configurations up to x16 - all elements that feed the requirements of next-generation graphics, backplanes, server, storage, HBA/NIC, and embedded markets.

PLX's PCI Express Gen 2 switches are fully compliant with the PCI-SIG PCIe base specification 2.0, which doubles the interconnect bit rate over its predecessor, to 5 GT/s (GigaTransfers per second) from 2.5 GT/s, and are backward compatible with Gen 1 thus allowing ease of migration with existing designs. Integrated non-transparency enables PCIe use in multi-host, host-failover/redundant systems and intelligent I/O modules. Unique power-reduction methods and a proprietary cut-through design for low latency down to 140ns are achieved through the company's signature engineering features achieved with PLX's third-generation PCIe architecture.

PLX's new switches complement 5GT/s speed with patent pending exclusive features such as Read Pacing, Dual Cast and Dynamic Credit Allocation to improve system performance. A typical application of Dual Cast is Fibre Channel host-bus adapter storage: Whereas the PLX switch uses Dual Cast to simultaneously store data on two RAID controllers, the same card can be used for non-redundant applications. Read Pacing allows desired distribution of system bandwidth in host-centric applications, providing greater throughput in data transfers from host memory. PLX housed its Gen 2 switches in the market's smallest footprint Flip-Chip packaging (19x19mm) to provide superior signal integrity while designing the ball placement for easy board layout. Additional PLX advantages include several on-chip de-bug features, the ability to do error injection, and performance monitoring counters which are all valuable in validating Gen 2 at the systems level.

PLX's 26 PCI Express switches and bridges provide board and system designers with the most extensive and proven lineup of products to address their wide variety of requirements. The company's PCIe switches range in density from three to 12 ports and from five to 48 lanes, while the PCIe bridges provide PCI, PCI-X and local-bus support. The PLX value-added portfolio includes the highest performance per watt, latency as low as 110ns, and integrated non-transparency and Hot-Plug functionality to help reduce customer's bill of material costs.



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