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| NetLogic Microsystems Selects Magma's Talus Magma Design Automation announced that NetLogic Microsystems has selected Talus for implementation of its next-generation knowledge-based processor and physical layer products. This expands upon the relationship between NetLogic Microsystems and Magma Design Automation, as NetLogic Microsystems has successfully taped out designs in process nodes ranging from 130 to 40 nanometers using Talus Vortex, Talus Plan Pro and Talus Power Pro. Talus' proven ability to address advanced design challenges and Magma's ongoing commitment to providing world-class support were cited as key influences in NetLogic Microsystems' decision. NetLogic Microsystems announced earlier this year that it has expanded its collaboration with Taiwan Semiconductor Manufacturing Company (TSMC) as a 28-nm Early Development Partner. NetLogic Microsystems has launched advanced product development for several of its industry-leading product lines on TSMC's NEXSYS 28HP (28-nm high performance) process node. The 28HP process offers significant speed, and power efficiency advantages over previous process nodes. Magma's Talus IC Implementation System is a fully integrated RTL-to-GDSII solution. The most important elements of Talus for NetLogic Microsystems include the placement technology, clock tree synthesis, and post route optimization. The placement technology was enhanced for NetLogic Microsystems' challenging floorplans to provide optimum routability, the lowest pin access congestion and the highest potential for timing closure. This allows designers to meet top-level timing goals and ensure that total chip area is minimized. Talus' clock tree synthesis balances the requirements of a robust clock tree (balanced latency and managed skew) while minimizing clock buffer area. Intelligent, activity-driven clock gating with closely coupled placement algorithms result in industry-leading clock performance with the lowest power metrics. Timing closure of designs at 40 nm and below must be validated under many scenarios. Talus addresses this with a comprehensive multi-mode multi-corner (MMMC) post-route optimization engine that optimizes across all active corners and still ensures that all timing, leakage and limit requirements are met without using punitive margins and overdesign. This technology was enhanced in the latest Talus release based on the collaborative work with NetLogic Microsystems to meet their very aggressive requirements on the number of sign-off scenarios. write your comments about the article :: © 2010 Computing News :: home page |