Hynix Announces 54nm 1Gb DRAM Validation

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Hynix Semiconductor has announced the validation per Intel procedures and specifications of 54nm 1Gb DDR2 DRAM. Hynix is one of the first suppliers in the industry to develop a 50nm-class process technology. The finer process design-rule of this 54nm product reduces die size by approximately 40% compared to 60nm-class process technology, significantly reducing costs and improving speed-power characteristics. Hynix "three-dimensional transistor" architecture and "W-DPG (Tungsten-Dual Poly Gate)" technologies minimize current leakage to further reduce overall power consumption.

This 54nm technology will be used to manufacture both DDR2 and DDR3 DRAMs in 1Gb and 2Gb densities beginning in the second half of next year. With growing demand for high capacity memory, Hynix plans to consistently enhance production capacity on the 54nm products to meet customer demand. This technology will also be used to build Graphics DRAM and Mobile DRAMs in the future.

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