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| ONFi Breaks Speed Barrier for NAND Flash The Open NAND Flash Interface (ONFi) Working Group, the organization dedicated to simplifying integration of NAND Flash memory into consumer electronic devices, computing platforms and industrial systems, has announced the availability of the 0.9 draft of the ONFi 2.0 specification to member companies. This signals the imminent release of the ONFi 2.0 specification in January 2008. With 71 member companies supporting ONFi development, this scaleable technology secures its foothold in the industry. ONFi 2.0 defines a high-speed NAND interface that delivers up to 133 MB/second in interface performance. The legacy NAND interface is limited to a maximum speed of 50 MB/second, significantly hampering the performance in applications such as solid state drives. The high-speed NAND definition is forward looking, with infrastructure in place to reach 400 MB/s in the third generation. With its backward compatibility and existing legacy NAND interface, ONFi 2.0 enables a graceful transition. After founding the group in 2006, the ONFi Working Group introduced the 1.0 specification in January 2007. While the first-generation technology standardized NAND electrical parameters and protocol interfaces, ONFi 2.0 focuses on improving speed while retaining backward compatibility. ONFi 2.0 reduces the time required to transfer data to and from the data buffer by using two techniques. The first is DDR signaling, which is commonly used in DRAMs. Secondly, ONFi uses source synchronous clocks that accurately latch signals enabling higher frequencies to be realized. Further platform performance enhancements are possible by using commands standardized in ONFi 1.0. For example, techniques such as combining interleaving and cache commands enable developers to increase concurrency/parallelism. The 0.9 draft of the ONFi 2.0 specification is currently available to members only, and will be available to the public online in Q1 2008. With the completion of the 2.0 specification, the ONFi Working Group will now focus on defining an addendum specification for a Flash module connector and form factor. This will enable an industry-standard, pluggable NAND module similar to a DRAM module used in computing platforms today. This module not only simplifies the motherboard design, but also provides the user the flexibility to easily upgrade the system as needed. Future generations of the specification will deliver speeds up to 400 MB/second. This next generation of the ONFi specification, targeted for completion in 2009, is aimed to double the interface speed delivered in ONFi 2.0. write your comments about the article :: © 2007 Computing News :: home page |