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| Mentor Graphics Issues Next-Generation OPC Solution Mentor Graphics has announced availability of Calibre nmOPC, a third-generation optical proximity correction (OPC) tool that expands the Calibre arsenal of resolution enhancement technology products for sub-65 nanometer process technologies. The Calibre nmOPC tool and the companion OPC verification tool, Calibre OPCverify (announced earlier this year), usher in a new era of computational lithography by delivering superior simulation accuracy with the highest performance and lowest cost of ownership in the industry. Low k1 photolithography processes are increasing the complexity of RET applications in nanometer designs. At 45nm, more complex models and through process window correction and verification requirements significantly increase computational burden. Both the lithographic challenges and the computational complexity associated with the 45nm process node create a need for advanced capabilities for computational lithography tools. Calibre nmOPC answers these challenges by delivering several innovations including dense simulation, process window optimized OPC, a hybrid computing platform utilizing co-processor acceleration (with the Cell BE processor), a new compact resist process modeling capability, and design-intent aware correction algorithms. The Calibre nmOPC tool offers best-in-class accuracy, speed, and cost of ownership. Like all Calibre family products, Calibre nmOPC and Calibre OPCverify run on the fully integrated Calibre hierarchical geometry engine uniquely enabling a fully integrated design to mask flow with a unified command language. Calibre nmOPC also delivers many practical production features such as: OASIS formatting to minimize output file size; new streamlined hierarchical processing to improve run time and file size compared to flat OPC tools, a progress meter and dynamic CPU allocation capability to manage TAT in a production environment. Process variability can have a dramatic effect on yield. This is especially true in the lithographic process where dose and focus variability impacts image fidelity. To reduce the risk of silicon failure and enable acceptable yield under challenging low k1 conditions, Calibre nmOPC uses both dense simulation capabilities, which provide 100 percent simulation coverage for the mask layer, and process window correction optimization algorithms to ensure silicon-patterning success. Calibre nmOPC also features multi-layer inputs into the correction algorithm to enable design critical features to be patterned to preserve design intent and parametric yield. Mentor addresses the rising cost of ownership associated with the geometrically increasing need for more CPUs by introducing a unique CoProcessor Architecture. The Remote Acceleration Simulation architecture elegantly enables the option of connecting a Coprocessor Acceleration cluster with an Ethernet connection to an existing compute cluster. Mentor has partnered with Mercury Computer Systems, a leader in high performance computing system design, to offer standard Coprocessor Acceleration clusters based on the ultra-high performance Cell Broadband Engine. The Cell Processor clusters accelerate the image processing components of Calibre nmOPC enabling 4 to 10X improvements in run time with little to no increase in general purpose computing requirements over the 65nm node. This innovative application of the Cell Processor to computational lithography will reset cost of ownership targets for the industry in line with customer requirements for cost mitigation. Mentor continues its legacy of providing high modeling accuracy and technology with the introduction of a new 4th generation compact resist process model. The new CM1 model demonstrates better accuracy than its predecessors, meeting customer requirements for the 45 and 32 nm process generations, and takes full advantage of the dense simulation capabilities of nmOPC and coprocessor acceleration. The automated calibration process for CM1 models yields excellent model stability and eliminates difficult optimization choices for the OPC engineer. write your comments about the article :: © 2006 Computing News :: home page |