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| Multi-threading MIPS32 34Kf Core MIPS Technologies, Inc. announced that Mobileye N.V. has licensed the newly announced MIPS32 34Kf core for its next-generation SoC, EyeQ-2. The current version, EyeQ-1, has been adopted by several top-tier suppliers and car manufacturers in Europe, the US and Japan, for installation in 2007-model-year production vehicles. EyeQ-1 will make its debut in the AWS after-market driver assistance products in March, 2006. Featuring lane-departure warning, forward-collision warning and vision/radar fusion for active safety, EyeQ-1 combines high performance and low cost in a technology aimed at revolutionizing the mass implementation of driver assistance systems. EyeQ-2 will add pedestrian detection capabilities to its extensive feature list and will debut in late 2008 models. The MIPS32 34K family of cores, a revolutionary multi-threading solution for high performance, cost-sensitive embedded applications has been introduced. Single-threaded microprocessors today waste many cycles while accessing memory, considerably limiting system performance. The 34K cores are designed to mask the effect of memory latency by increasing processor utilization. As one thread stalls for memory, additional threads are fed into the pipeline, resulting in a significant gain in application throughput. Internal benchmarks indicate that the 34Kc core running two threads achieved a 60% speedup over a single-threaded processor with only a 14% increase in die size. Additionally, the 34K core family delivers superior real-time responsiveness for embedded applications. Users can allocate dedicated processing bandwidth to real-time tasks resulting in a guaranteed Quality of Service (QoS). This mechanism constantly monitors the progress of threads and dynamically takes corrective actions to meet or exceed the real-time requirements. write your comments about the article :: © 2006 Computing News :: home page |